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| january 2013 doc id 024010 rev 1 1/22 AN4217 application note designing the spv1020 with serial and parallel output configurations by massimiliano santo antonino ragusa introduction the steval-isv008v1 and steval-isv018v1 demonstration boards are based on stmicroelectronics? photovoltaic pro ducts spv1020, spv1001 n30 and spv1001n40. these boards are designed for innovative distributed pv panels and their size is suitable for most junction boxes available on the market. each pcb uses three of the spv1020 solar boost mppt regulators, whose outputs can be connected in parallel (steval-isv008v1) or in series (steval-isv018v1). details on the spv1020 device can be found in the product?s datashee t, and in application note an3392, both available at www.st.com . the spv1001n30 is used as a high efficiency bypass device between the input and output. it automatically turns on when the spv1020 is off due to an input voltage lower than its uvlo. the spv1001n40 is used as a high efficiency bypass device at the output stage of each spv1020. it automatically turns on when the spv1020 is off, offering a low impedance path from v out- to the output rail v out+ , as shown in figure 5. www.st.com
output parallel and series (bottom and top view) connections AN4217 2/22 doc id 024010 rev 1 1 output parallel and series (bottom and top view) connections figure 1. steval-isv008v1 (output parallel connection) bottom view figure 2. steval-isv008v1 (output parallel connection) top view figure 3. steval-isv018v1 (output series connection) bottom view figure 4. steval-isv018v1 (output series connection) top view AN4217 connections doc id 024010 rev 1 3/22 2 connections 2.1 input and output connection example the following figure shows how to connect steval-isv0x8v1 to a distributed photovoltaic panel and load. please note that although the illustration belo w refers to the stev al-isv008v1, the input and output connections are the same for the steval-isv018v1. figure 5. steval-isv008v1 input and output connection example 3 9 s d q h o 6 7 ( 9 $ / , 6 9 9 6 3 9 d q g 6 3 9 1 1 d w w k u e r w w r p v l g h steval-isv0x8v1 parallel and series connection AN4217 4/22 doc id 024010 rev 1 3 steval-isv0x8v1 parallel and series connection the output pins of differen t spv1020 devices can be connec ted both in parallel and in series. in both cases, the output power (p out ) will depend on light irra diation of each panel (p in ), application efficiency and by the specific constraints of the selected topology. the objective of this section is to show how the output power is impacted by the selected topology. examples with three pv panels are presented and the results can be extended to a larger number of pv panels. when the spv1020 is on (light irradiation generating v in 6.5 v) equation 1 when the spv1020 is off, system efficiency will depend upon the drop of the bypass diodes (d1, d10, d12, as shown in th e steval-isv0x8v1 schematics see figure 17 and figure 18 ): equation 2 in the case of panel completely shaded: equation 3 3.0.1 steval-isv008v1 parallel connection this topology guarantees the desired output voltage even if only one of the panels is irradiated. output voltage of the steval-i sv008v1 is limited to the spv1020 maximum output voltage, which is 40 v. figure 5 and 6 show details of the parallel connection topology: p inx p outx = ] 3 .. 1 [ = x p inx p outx bp = ] 3 .. 1 [ = x 0 = p out x figure 6. steval-i sv008v1, panel connections for output parallel connection figure 7. steval-isv008v1, component configuration for output parallel connection AN4217 steval-isv0x8v1 parallel and series connection doc id 024010 rev 1 5/22 the output partitioning (r3/r4, r9/r10, r16/r17 in the steval-isv0x8v1 schematic) of each of the three spv1020 devices must be in accordance with the desired v out . according to the topology: equation 4 according to the light irradiation on each panel (p in ) and to the system efficiency ( ), output power is: equation 5 therefore: equation 6 each spv1020 contributes to th e output power providing i outx according to the irradiation of its panel. moreover, the desired v out is guaranteed if at least one of the three pv panels provides enough voltage to turn on the related spv1020. figure 8 shows the power conversion efficiency when v mpp = 12 v and i mpp ranges from 1 a to 8 a (in steps of 1 a). power ranges between 36 w and 288 w. 3 2 1 v out v out v out v out = = = 3 2 1 i out i out i out i out + + = 3 2 1 p out p out p out p out + + = i out x v out x p out x * = ] 3 .. 1 [ = x i in x v i nx p inx * = ] 3 .. 1 [ = x 3 2 1 ) 3 2 1 ( p in p in p in i out i out i out v out p out + + = + + = steval-isv0x8v1 parallel and series connection AN4217 6/22 doc id 024010 rev 1 figure 8. power efficiency versus output voltage figure 9 shows the mppt efficiency (*) when v mpp = 12 v and i mpp ranges from 1 a to 8 a (in steps of 1a). power ranges between 36 w and 288 w. (*) mppt efficiency = p in /p max ; p in is the power measured at the input stage of the pcb; p max is the maximum power the pv panel can provide. figure 9. mppt efficiency versus output voltage AN4217 steval-isv0x8v1 parallel and series connection doc id 024010 rev 1 7/22 3.0.2 steval-isv018v1 series connection this topology provides an output voltage that is the sum of the output voltages of each spv1020 connected in series. the following in formation shows how the output power is determined by the output series connection. figure 10 shows a detail of the series connection topology: in this case, the topology constraint implies: equation 7 in the case where the irradiation is the same for each panel: equation 8 so equation 9 for example, assuming, p out = 90 w and, if desired v out = 90 v then v outx = 30 v lower irradiation for one panel, for example on panel 2, causes lower output power, so lower v out2 due to the i out constraint: figure 10. steval-isv018v1, panel connections for output series connection figure 11. steval-isv018v1, components configuration for output series connection 3 2 1 i out i out i out i out = = = 3 2 1 v out v out v out v out + + = 3 2 1 p i n p i n p in = = p out x p out * 3 = ] 3 .. 1 [ = x p out p outx 3 1 = i out v out i out x v out x p out x * 1 * = = v out v outx 3 1 = steval-isv0x8v1 parallel and series connection AN4217 8/22 doc id 024010 rev 1 equation 10 the output voltage (v out ) required by the load can be supplied by the first and third spv1020 but only up to the limit imposed by their output voltage resistor partitioning (r3/r4, r9/r10, r16/r17 in the steval-isv0x8v1 schematics). these examples show various scenarios as shown in the steval-isv0x8v1 schematics. assuming the following c onditions: r3/r4 limits v outx to 40 v and the desired v out = 90 v. example 1: panel 2 has 75% of the irradiation of panels 1 and 3: equation 11 two of the spv1020 devices (first and third) supply most of the voltage output due to lower irradiation on panel 2. note: spv1020 is a boost controller, so v outx must be higher than v inx , otherwise the spv1020 turns off and the input power is transferred to the output stage trough bypass diodes (d1, d10 or d12). example 2: panel 2 has 25% of the irradiation of panels 1 and 3: i out p out x v out x = 3 * 4 3 1 * 4 3 2 v out v out v out = = w p out p out 30 2 1 = = w p in p out 5 . 22 1 4 3 2 = = w p out p out p out p out 5 . 82 3 2 1 = + + = a v out p out i out 92 . 0 90 5 . 82 = = = v v out v out 6 . 32 92 . 0 30 3 1 = = = AN4217 steval-isv0x8v1 parallel and series connection doc id 024010 rev 1 9/22 equation 12 in this case the system is at its limit. a lower irradiation will impact v out1 and/or v out3 which are already at the limit (40 v) imposed by r3/r4 partitioning. example 3: panel 2 is completely shaded. in this case, the maximum v out available is 80 v (v out1 +v out3 ). on the steval-isv018v1 application board, bypass diode (d4) around the second spv1020 allows i out to flow. figure 12 shows power conversion efficiency when v mpp = 12 v and i mpp ranges from 1 a to 8 a (in steps of 1 a). power ranges between 36 w and 288 w. 3 0 40 0.75 v o u t1 = v = v v o u t 10 75 . 0 5 . 7 2 = = v o u t 3 = 3 * 4 1 1 * 4 1 2 v out v out v out = = w p out p out 30 2 1 = = w p in p out 5 . 7 1 4 1 2 = = w p out p out p out p out 5 . 67 3 2 1 = + + = a v out p out i out 75 . 0 90 5 . 67 = = = steval-isv0x8v1 parallel and series connection AN4217 10/22 doc id 024010 rev 1 figure 12. power efficiency versus output voltage figure 13. mppt efficiency versus output voltage figure 12 shows mppt efficiency when v mpp = 12 v and i mpp ranges from 1 a to 8 a (in steps of 1 a). power ranges between 36 w and 288 w. in both cases all the three strings have the same input power. figure 14 shows the output current versus input current when the input power to each string is different. the configurations are: AN4217 steval-isv0x8v1 parallel and series connection doc id 024010 rev 1 11/22 figure 14. output current vs input current table 1. v in = 12 v, v out = 80 v istring1 istring2 istring3 444 664 884 2 x w s x w & x u u h q w > $ @ , q s x w & x u u h q w > $ @ , 6 9 9 9 r x w > 9 @ steval-isv0x8v1 parallel and series connection AN4217 12/22 doc id 024010 rev 1 figure 15. steval-isv008v1 spi connection figure 16. steval-isv018v1 spi connection in the steval-isv008v1 the spi connection is accomplis hed by means of the j46 connector. instead in steval-isv008v1 the sp i connection requires additional external components not present in the steval-isv008v1. these additional components are shown in figure 16 . AN4217 bom doc id 024010 rev 1 13/22 4 bom the steval-isv008v1 and steval-isv018v1 differ mainly in their output configurations (defined by r22 and r23 for steval-isv008v1 and by r24, r25, r26 and r27 for steval-isv018v1). the spi connector j46 is available only on steval-isv008v1. the following table shows the list of external components configuring the steval- isv0x8v1; last column highlights the difference between steval-isv008v1 and steval- isv018v1. the application boards have been designed for pv strings providing v oc = 15 v, i sc =9 a, output voltage of each spv1020 v out_max = 36 v and f sw = 100 khz. table 2. steval-isv008v1 and steval-isv018v1 component list component name value supplier part number notes: [steval- isv008v1 vs. steval- isv018v1] c1, c2,c3,c4, c16, c17, c18, c21, c24, c25,c26, c29 bootstrap capacitors 100 nf murata epcos grm188r71c104ka01 c1608x7r1h104k c11, c37, c39 input supply pin capacitor 1 f murata epcos grm31mr71h105ka8 8 c3216x7r1h105k\ c5, c36, c38 input capacitor 4.7 uf murata epcos grm32er71h475ka88 k c3225x7r1h475k c9, c14, c22 voltage sensing capacitor 220 pf murata epcos grm188r71e221ka01 c1608c0g1h221j c8, c19, c27 compensation capacitor 22 nf murata epcos grm188r71c223ka01 c1608x7r1h223k c10, c15, c23 voltage sensing capacitor 220 pf murata epcos grm188r71e221ka01 c1608c0g1h221j c7, c20, c28 internal reference voltage capacitor 470 nf murata epcos grm188r71a474ka61 c1608x7r1c474k c6, c12, c13, c40, c41, c42 c30, c31, c32, c43, c44, c48 c33, c34, c35, c45, c46, c47 output capacitor 4.7 uf murata epcos grm32er71h475ka88 k c3225x7r1h475k d3, d9, d11 noise filter on supply pin stps160u st stps160u bom AN4217 14/22 doc id 024010 rev 1 r1,r11,r18 input voltage partitioning resistor 1.2 m vishay d11/crcw0603 1.2m r2,r12,r19 input voltage partitioning resistor 110 k cyntec rr0816r-114-dn-11 r3,r9,r16 output voltage partitioning resistor 3.9 m vishay d11/crcw0603 4.3m 1% r4,r10,r17 output voltage partitioning resistor 110 k cyntec rr0816r-114-dn-11 r5,r13,r20 compensation resistor 1 k cyntec rr0816r-102-dn-11 r6, r8,r15 pull up resistor (note: r6 must be removed if r7 is soldered) 0 r7 (optional) r14 (optional) r21 (optional) oscillator resistor (note: r6 must be removed if r7 is soldered) depending on desired fsw l1, l2, l3, l4 l5, l6, l7, l8 l9, l10, l11, l12 phase x (x=1..4) inductors 47 uh epcos coilcraft cyntec murata b82477g4473m003 mss1278t-473ml pimb136t-470ms- 11 49470sc d1,d10,d12 bypass diodes spv1001n 30 st sv1001n30 d2,d4,d8 bypass diodes stps15l6 0cb-tr st stps15l60cb-tr j35,j37,j38 st supply spv1020 st spv1020 j46 spi connector 6-pin connector phoenix contact mpt 0.5/ 6-2.54 disconnect ed on steval- isv018v1. d5,d6,d7 600w, 40v unidirectional protection transil smbj36ca st smbj36a-tr table 2. steval-isv008v1 and steval-isv018v1 component list (continued) AN4217 bom doc id 024010 rev 1 15/22 r22, r23 output series connection switch 0 vishay crcw25120000z0egh p mounted on steval- isv008v1; not mounted on steval- isv018v1 r24, r25, r26, r27 output parallel connection switch 0 vishay crcw25120000z0egh p mounted on steval- isv018v1; not mounted on steval- isv008v1 j47, j48 output connector faston connect or table 2. steval-isv008v1 and steval-isv018v1 component list (continued) schematic diagrams AN4217 16/22 doc id 024010 rev 1 5 schematic diagrams figure 17. steval-isv008v1 schematic ' 5 $ ) 7 AN4217 schematic diagrams doc id 024010 rev 1 17/22 figure 18. steval- isv018v1 schematic 7 * / @ 4 / 4 @ . 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- 7 7 1 1 , , 2 2 3 3 * * 1 1 , , 5 5 ( ( ' ' / / 2 2 6 6 1 1 2 2 7 7 6 6 $ $ ) ) / / + + x x 5 5 + + x x / / & & ) ) x x / / + + x x 5 5 0 0 ) ) q q & & & & ) ) x x & & ) ) x x & & ) ) x x 8 8 $ $ 7 7 $ $ 1 1 2 2 & & 5 5 n n ) ) q q & & & & ) ) x x 5 5 n n & & ) ) x x 5 5 0 0 1 1 9 9 3 3 6 6 ' ' / / + + x x ' ' 1 1 9 9 3 3 6 6 ) ) q q & & & & ) ) x x ' ' $ $ & & % % 0 0 6 6 & & ) ) x x + + x x / / & & ) ) s s 5 5 n n 3 3 7 7 7 7 1 1 , , 2 2 3 3 * * 1 1 , , 5 5 ( ( ' ' / / 2 2 6 6 ' ' $ $ & & % % 0 0 6 6 8 8 6 6 3 3 7 7 6 6 ' ' ) ) q q & & ) ) q q & & & & ) ) x x 5 5 ' ' $ $ & & % % 0 0 6 6 + + x x / / ) ) q q & & 5 5 n n ) ) q q & & + + x x / / 8 8 6 6 3 3 7 7 6 6 ' ' / / + + x x 5 5 5 5 & & ) ) s s 5 5 8 8 6 6 3 3 7 7 6 6 ' ' n n & & ) ) x x & & ) ) x x / / + + x x & & ) ) x x 5 5 5 5 n n ) ) q q & & & & ) ) s s ) ) q q & & 1 1 9 9 3 3 6 6 ' ' 3 3 7 7 7 7 1 1 , , 2 2 3 3 * * 1 1 , , 5 5 ( ( ' ' / / 2 2 6 6 & & ) ) x x & & ) ) x x ) ) q q & & + + x x / / ' ' 1 1 9 9 3 3 6 6 ) ) q q & & 5 5 n n 5 5 n n & & ) ) x x ) ) q q & & 5 5 5 5 0 0 ) ) q q & & & & ) ) x x & & ) ) s s 1 1 9 9 3 3 6 6 ' ' & & ) ) x x & & ) ) x x 8 8 $ $ 7 7 $ $ 1 1 2 2 & & 3 3 7 7 & & 7 7 1 1 , , 2 2 3 3 * * 1 1 , , 5 5 ( ( ' ' / / 2 2 6 6 ) ) x x ) ) q q & & 5 5 & & ) ) x x ' ' 1 1 9 9 3 3 6 6 ) ) q q & & 5 5 / / + + x x 5 5 0 0 3 3 7 7 & & 7 7 1 1 , , 2 2 3 3 * * 1 1 , , 5 5 ( ( ' ' / / 2 2 6 6 ) ) x x & & ) ) x x 5 5 8 8 $ $ 7 7 $ $ 1 1 2 2 & & 3 3 7 7 & & 7 7 1 1 , , 2 2 3 3 * * 1 1 , , 5 5 ( ( ' ' / / 2 2 6 6 ) ) x x & & ) ) s s 5 5 0 0 5 5 0 0 - - 1 1 2 2 7 7 6 6 $ $ ) ) ) ) q q & & layout guidelines AN4217 18/22 doc id 024010 rev 1 6 layout guidelines pcb layout is very important in order to minimize noise, high frequency resonance problems and electromagnetic interference. paths between each inductor and its relative pin must be designed with the same resistance. different resistances among the four branches can be the cause of unbalanced current flow among the four branches. unbalanced currents could damage the chip or cause poor mppt tracking. to reduce radiation and resonance problems it is essential to keep high current paths as small as possible. large traces for high current paths and an extended ground plane under the metal slug of the package help reduce noise and improve heat dissipation, as well as increase the efficiency. high current paths are highlighted by thicker lines in the figure 17 and figure 18 . input and output capacitors must be close as possible to the device. output capacitance must be equally distributed among the v out pins of the device. for example, refer to the placement of c6, c12, c13, c40, c41 and c42 in figure 19: steval-isv008v1 pcb layout example (top view) boostrap capacitors (connect ed between lx and cbx pins) mu st be connected as close as possible to the related pins. external resistor dividers should be as close as possible to the v in_sns and v out_sns pins of the device, and as far as possible from the high current circulating paths, to avoid noise pickup. for an example of a recommended layout, see the following demonstration board (dimensions expressed in mm): figure 19. steval-isv008v1 pcb layout example (top view) AN4217 layout guidelines doc id 024010 rev 1 19/22 figure 20. steval- isv008v1 pcb layout example (bottom view) figure 21. steval-isv018v1 pcb layout example (bottom view) layout guidelines AN4217 20/22 doc id 024010 rev 1 figure 22. steval- isv018v1 pcb layout example (bottom view) AN4217 revision history doc id 024010 rev 1 21/22 7 revision history table 3. document revision history date revision changes 22-jan-2013 1 initial release. AN4217 22/22 doc id 024010 rev 1 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by two authorized st representatives, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com |
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